An Open Tool Architecture for the Formal Verification of Logic Controllers in Processing Systems
نویسندگان
چکیده
A tool environment for the formal veriication of logic controllers for switched continuous systems is presented. It supports a model-based veriication approach which builds on diierent models of the controller and the plant. The architecture consists of a hierarchical plant modeling editor, a translator for the input of controllers given in IL code, and an interface to integrate available model-checkers, e.g., for Timed Automata. In the paper, each architecture component is described and the modeling interface is illustrated by an example.
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